Dmitry Grinberg, a seasoned tinkerer, wanted to increase the limited RAM capacity of his Raspberry Pi 2040 (RP2040). The board originally came with only 264kb of on-board SRAM. While the chip had the ability to support up to 16MB of off-flash memory via a QSPI bus, it lacked memory mapping capabilities. However, Dmitry found an ingenious workaround by utilizing the XIP (Execute in Place) mode and mapping 8MB of external QSPI RAM into the chip’s address space.
XIP mode allows the RP2040 to retrieve data from an external chip when required and store it in the RP2040 caches mapped at 0x10xxxxxx. It’s important to note that the RP2040 can only perform read and execute operations in XIP mode. To achieve this, Dmitry’s first step was to transfer data from persistent storage to RAM during boot. He accomplished this by using a dual-OR gate IC, an inverter, and two resistors to toggle the nCS pin, which selects between flash and RAM. A first-stage bootloader then copies the program from flash to RAM, sets up XIP mode, and launches a second-stage loader.
Of course, there were some obstacles along the way. The RP2040’s GPIO IP block doesn’t reset properly, causing the nCS pin to fail in reverting to selecting flash after a reset. However, Dmitry overcame this issue by utilizing an I2C IO expander to control the pin as desired.
The next hurdle was writing changes back to RAM when the cache was flushed. Dmitry addressed this challenge by leveraging the Memory Protection Unit (MPU). Typically, writing to 0x10xxxxxx would flush the cache line, but by marking that region as read-only, the MPU could trigger a hard fault when a write occurs. The fault handler emulates the write instruction and flushes the cache line. Though it may seem straightforward at a high level, ARMv6M has 127 different types of write instructions, making performance a significant concern. Fortunately, Dmitry achieved an impressive 36 Mbit/s clock rate for the memcpy function, making it a practical solution despite the challenges.
Dmitry has graciously made his groundbreaking code available for download on his website under the BSD-2 license. This allows others to explore the potential of utilizing a large amount of RAM on the RP2040 microcontroller. This innovative approach opens up numerous creative possibilities. While this may not be the first emulator developed for the RP2040, the partial ARMv6 emulation makes it an impressive achievement, as seen in this RISC-V emulator.
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